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NEW Exablaze EXANIC X10: Ultra Low Latency Network Interface Card

05 Nov 2015

XENON SystemsBack to NewsBack to New ProductsNEW Exablaze EXANIC X10: Ultra Low Latency Network Interface Card

exanicx10_banner_11102015

Exablaze’s ExaNIC X10 is an ultra low latency network interface card which delivers the lowest latency in the industry: 780ns application to application for small Ethernet frames (using the native API) and under a microsecond for small TCP and UDP payloads (using the transparent socket acceleration library).

ULTRA LOW LATENCY NETWORK INTERFACE CARD

The ExaNIC is a 10Gbps PCI Express network card interface card specifically optimized for low latency environments.
While initially conceived and built for use in latency-sensitive financial applications such as high frequency trading, the ExaNIC has appeal that extends to any environment where latency is key.

exanic-x10-medium

INDUSTRY-LEADING LATENCY

Designed from the ground up to minimize latency, the ExaNIC delivers record-breaking performance numbers.
On an Intel Ivy Bridge test system, median latency from application to network to application is 780 nanoseconds for small packets, which is significantly better than competing network cards on the same hardware. Half round trip TCP latencies are as low as 930 nanoseconds for small payloads.

EASY TO USE

In addition to a standard Linux driver, a transparent TCP and UDP acceleration library is included, as well as a library for low-level access.
A transparent socket acceleration library allows applications to benefit from the low latency of kernel bypass, in most cases without modifications to the applications. For the most latency sensitive applications, a library called ‘libexanic’ allows direct low-level access to the ExaNIC hardware and includes simple functions for sending and receiving Ethernet frames. With the optional firmware development kit, it is even possible to extend the ExaNIC firmware and add your own logic to the onboard FPGA.

ADVANCED CAPTURE AND TIMESTAMPING

Flow steering delivers packets to the right application’s receive buffer, while flow hashing distributes packets across multiple CPU cores for demanding capture applications. Built-in timestamping functionality records each frame’s arrival time to a granularity of 6.2ns.
These timestamps are available through the API and through a capture utility which can write tcp dumpcompatible capture files. Additionally, the ExaNIC has a Pulse-Per-Second (PPS) input which can be used to synchronize the ExaNIC clock with a PPS source such as a GPS receiver, allowing users to meaningfully compare captured timestamps across multiple servers and geographic locations. The PPS input can also act as a PPS output for instances where one ExaNIC should act as the PPS source for other devices in a rack.

BUILT–IN BRIDGING

The ExaNIC includes integrated support for bridging, which can further reduce latency by hundreds of nanoseconds.
Normally sharing an upstream connection between multiple servers would necessitate introducing a switch. The bridging feature allows the most latency critical server to be directly connected to the upstream connection. Packets not destined for the local server can be bridged to the second port, transparently and with low latency. This port could be connected to a backup server or to a downstream switch.

ModelExaNIC X10
Form factor
  • Low profile PCI Express Card
  • 117x68mm (4.65×2.67in)
Ports
  • 2 SFP+
  • SMA for PPS in/out
Data rates10GbE, 1GbE, 100M Fast Ethernet
Supported MediaFiber (10GBASE-SR, 10GBASE-LR, 1000BASE-SX), SFP+ Direct Attach
Host InterfacePCIe x8 Gen 3 @ 8.0 GT/s per lane
Operating Systems
  • Linux x86_64 (all distributions)
  • Windows (coming soon)
Typical latency, raw frames (See Note 1)
  • 60 bytes: 780 ns
  • 300 bytes: 1 μs
Typical latency, raw frames with preloaded TX buffer (See Note 1)
  • 60 bytes: 780 ns
  • 300 bytes: 1 μs
Typical latency, UDP (See Note 2)
  • 14 bytes: 880 ns
  • 300 bytes: 1.2 μs
Typical Latency, TCP (See Note 2)
  • 14 bytes: 930 ns
  • 300 bytes: 1.2 μs
Timestamp resolution6.2ns
Timestamp availabilityAll received frames, most recent transmitted frame
Time synchronizationHost, hardware assisted PTP, optional PPS
PPS input/output3.3V CMOS, selectable 50ohm termination
BridgingOptional forwarding between ports 1 and 2, latency <110ns
CaptureLine rate capture to disk
Flow steering
  • 128 IP rules per port
  • 64 MAC rules per port
FPGA Development Kit
  • Add custom user logic to FPGA
  • Xilinx Ultrascale XCKU035-2
  • Fully integrated with drivers, utilities & TCP/UDP stack

Notes:
1. Latencies are median latencies for raw frames from wire-userspace-wire via the libexanic library, on a 3.5Ghz Intel Ivy Bridge processor.
2. Latencies are median half round trip time latencies for the sockperf benchmark using the exasock socket acceleration library.
More information about benchmarking methodology is available on request.

For more information about ExaNIC X10, please contact XENON here or call 1300 888 030.

ExaBlaze, ExaNIC

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